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  1 plcc, top view features ? fast read access time - 90 ns ? dual voltage range operation C unregulated battery power supply range, 2.7v to 3.6v or standard 5v 10% supply range ? compatible with jedec standard at27c020 ? low power cmos operation C20 m a max. (less than 1 m a typical) standby for v cc = 3.6v C 29 mw max. active at 5 mhz for v cc = 3.6v ? wide selection of jedec standard packages C 32-lead plcc C 32-lead tsop (8 x 20mm) C 32-lead vsop (8 x 14mm) C 42-ball cbga (8 x 8mm) ? high reliability cmos technology C 2,000v esd protection C 200 ma latchup immunity ? rapid ? programming algorithm - 100 m s/byte (typical) ? cmos and ttl compatible inputs and outputs C jedec standard for lvttl and lvbo ? integrated product identification code ? commercial and industrial temperature ranges description the at27bv020 is a high-performance, low-power, low-voltage 2,097,152-bit one- time programmable read only memory (otp eprom) organized as 256k by 8 bits. it requires only one supply in the range of 2.7 to 3.6v in normal read mode operation, making it ideal for fast, portable systems using either regulated or unregulated battery power. at27bv020 2-megabit (256k x 8) unregulated battery-voltage ? high speed otp eprom at27bv020 tsop, vsop top view type 1 0902a-aC10/97 pin configurations pin name function a0 - a17 address o0 - o7 outputs ce chip enable oe output enable pgm program strobe (continued) cbga top view a b c d e f 1 234567 gnd a17 a10 a14 a16 a15 o6 o7 nc a13 a11 a12 vcc o4 o5 a9 pgm a8 vcc nc nc nc nc nc o2 nc o3 nc a7 vpp oe o0 o1 a6 a4 a5 gnd ce a0 a3 a1 a2
at27bv020 2 atmels innovative design techniques provide fast speeds that rival 5v parts while keeping the low power consump- tion of a 3v supply. at v cc = 2.7v, any byte can be accessed in less than 90 ns. with a typical power dissipa- tion of only 18 mw at 5 mhz and v cc = 3v, the at27bv020 consumes less than one fifth the power of a standard 5v eprom. standby mode supply current is typically less than 1 m a at 3v. the at27bv020 simplifies system design and stretches battery lifetime even further by eliminating the need for power supply regulation the at27bv020 is available in industry standard jedec approved one-time programmable (otp) plastic plcc, tsop and vsop packages, as well as a 42-ball, 1 mm pitch, plastic chip-scale ball grid array package (cbga). all devices feature two-line control (ce , oe ) to give design- ers the flexibility to prevent bus contention. the at27bv020 operating with v cc at 3.0v produces ttl level outputs that are compatible with standard ttl logic devices operating at v cc = 5.0v. at v cc = 2.7v, the part is compatible with jedec approved low voltage battery oper- ation (lvbo) interface specifications. the device is also capable of standard 5-volt operation making it ideally suited for dual supply range systems or card products that are pluggable in both 3-volt and 5-volt hosts. atmel's at27bv020 has additional features to ensure high quality and efficient production use. the rapid ? program- ming algorithm reduces the time required to program the part and guarantees reliable programming. programming time is typically only 100 m s/byte. the integrated product identification code electronically identifies the device and manufacturer. this feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. the at27bv020 programs exactly the same way as a standard 5v at27c020 and uses the same programming equipment. system considerations switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. unless accommodated by the system design, these tran- sients may exceed data sheet limits, resulting in device non-conformance. at a minimum, a 0.1 m f high frequency, low inherent inductance, ceramic capacitor should be uti- lized for each device. this capacitor should be connected between the v cc and ground terminals of the device, as close to the device as possible. additionally, to stabilize the supply voltage level on printed circuit boards with large eprom arrays, a 4.7 m f bulk electrolytic capacitor should be utilized, again connected between the v cc and ground terminals. this capacitor should be positioned as close as possible to the point where the power supply is connected to the array.
at27bv020 3 block diagram absolute maximum ratings* *notice: stresses beyond those listed under absolute maxi- mum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other condi- tions beyond those indicated in the operational sec- tions of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note: minimum voltage is -0.6v dc which may undershoot to - 2.0v for pulses of less than 20 ns.maximum output pin voltage is v cc + 0.75v dc which may be exceeded if cer- tain precautions are observed (consult application notes) and which may overshoot to +7.0v for pulses of less than 20 ns. temperature under bias.................................. -40c to +85c storage temperature ..................................... -65c to +125c voltage on any pin with respect to ground .........................................-2.0v to +7.0v (1) voltage on a9 with respect to ground ......................................-2.0v to +14.0v (1) v pp supply voltage with respect to ground .......................................-2.0v to +14.0v (1) operating modes notes: 1. x can be v il or v ih . 2. read, output disable, and standby modes require, 2.7v v cc 3.6v, or 4.5v v cc 5.5v. 3. refer to programming characteristics. programming modes requires v cc = 6.5v. 4. v h = 12.0 0.5v. 5. two identifier bytes may be selected. all ai inputs are held low (v il ), except a9 which is set to v h and a0 which is toggled low (v il ) to select the manufacturers identification byte and high (v ih ) to select the device code byte. mode / pin ce oe pgm ai v pp v cc outputs read (2) v il v il x (1) ai x v cc (2) d out output disable (2) x v ih xxxv cc (2) high z standby (2) v ih xx x xv cc (2) high z rapid program (3) v il v ih v il ai v pp v cc (3) d in pgm verify (3) v il v il v ih ai v pp v cc (3) d out pgm inhibit (3) v ih xx x v pp v cc (3) high z product identification (3)(5) v il v il x a9 = v h (4) a0 = v ih or v il a1 - a17 = v il xv cc (3) identification code
at27bv020 4 dc and ac operating conditions for read operation dc and operating characteristics for read operation notes: 1. v cc must be applied simultaneously with or before v pp , and removed simultaneously with or after v pp . 2. v pp may be connected directly to v cc , expect during programming. the supply current would then be the sum of i cc and i pp . at27bv020 -90 -12 -15 operating temperature (case) com. 0c - 70c 0c - 70c 0c - 70c ind. -40c - 85c -40c - 85c -40c - 85c v cc power supply 2.7v to 3.6v 2.7v to 3.6v 2.7v to 3.6v 5v 10% 5v 10% 5v 10% symbol parameter condition min max units v cc = 2.7v to 3.6v i li input load current v in = 0v to v cc 1 m a i lo output leakage current v out = 0v to v cc 5 m a i pp1 (2) v pp (1) read/standby current v pp = v cc 10 m a i sb v cc (1) standby current i sb1 (cmos), ce = v cc 0.3v 20 m a i sb2 (ttl), ce = 2.0 to v cc + 0.5v 100 m a i cc v cc active current f = 5 mhz, i out = 0 ma, ce = v il , v cc = 3.6v 8 ma v il input low voltage v cc = 3.0 to 3.6v -0.6 0.8 v v cc = 2.7 to 3.6v -0.6 0.2 x v cc v v ih input high voltage v cc = 3.0 to 3.6v 2.0 v cc + 0.5 v v cc = 2.7 to 3.6v 0.7 x v cc v cc + 0.5 v v ol output low voltage i ol = 2.0 ma 0.4 v i ol = 100 m a0.2v i ol = 20 m a0.1v v oh output high voltage i oh = -2.0 ma 2.4 v i oh = -100 m av cc - 0.2 v i oh = -20 m av cc - 0.1 v v cc = 4.5v to 5.5v i li input load current v in = 0v to v cc 1 m a i lo output leakage current v out = 0v to v cc 5 m a i pp1 (2) v pp (1) read/standby current v pp = v cc 10 m a i sb v cc (1) standby current i sb1 (cmos), ce = v cc 0.3v 100 m a i sb2 (ttl), ce = 2.0 to v cc + 0.5v 1 ma i cc v cc active current f = 5 mhz, i out = 0 ma, ce = v il 25 ma v il input low voltage -0.6 0.8 v v ih input high voltage 2.0 v cc + 0.5 v v ol output low voltage i ol = 2.1 ma 0.4 v v oh output high voltage i oh = -400 m a2.4v = preliminary information
at27bv020 5 ac characteristics for read operation (v cc = 2.7v to 3.6v and 4.5v to 5.5v) note: 2,3,4,5. - see ac waveforms for read operation ac waveforms for read operation (1) notes: 1. timing measurement references are 0.8v and 2.0v. input ac drive levels are 0.45v and 2.4v, unless otherwise specified. 2. oe may be delayed up to t ce - t oe after the falling edge of ce without impact on t ce . 3. oe may be delayed up to t acc - t oe after the address is valid without impact on t acc . 4. this parameter is only sampled and is not 100% tested. 5. output float is defined as the point when data is no longer driven. symbol parameter condition at27bv020 units -90 -12 -15 min max min max min max t acc (3) address to output delay ce = oe = v il 90 120 150 ns t ce (2) ce to output delay oe = v il 90 120 150 ns t oe (2)(3) oe to output delay ce = v il 50 50 60 ns t df (4)(5) oe or ce high to output float, whichever occurred first 40 40 50 ns t oh output hold from address, ce or oe , whichever occurred first 0 00 ns = preliminary information
at27bv020 6 input test waveform and measurement level input test waveform and measurement level pin capacitance (1) (f = 1 mhz, t = 25c) note: typical values for nominal supply voltage. this parameter is only sampled and is not 100% tested. typ max units conditions c in 48pf v in = 0v c out 812pf v out = 0v note: cl = 100 pf including jig capacitance. t r , t f < 20 ns (10% to 90%) output test load
at27bv020 7 programming waveforms (1) notes: 1. the input timing reference is 0.8v for v il and 2.0v for v ih . 2. t oe and t dfp are characteristics of the device but must be accommodated by the programmer. 3. when programming the at27bv020 a 0.1 m f capacitor is required across v pp and ground to suppress spurious voltage transients. dc programming characteristics t a = 25 5c, v cc = 6.5 0.25v, v pp = 13.0 0.25v symbol parameter test conditions limits units min max i li input load current v in = v il ,v ih 10 m a v il input low level -0.6 0.8 v v ih input high level 2.0 v cc + 0.5 v v ol output low voltage i ol = 2.1 ma 0.4 v v oh output high voltage i oh = -400 m a2.4 v i cc2 v cc supply current (program and verify) 40 ma i pp2 v pp supply current ce = pgm = v il 20 ma v id a9 product identification voltage 11.5 12.5 v
at27bv020 8 ac programming characteristics t a = 25 5c, v cc = 6.5 0.25v, v pp = 13.0 0.25v notes: 1. v cc must be applied simultaneously or before v pp and removed simultaneously or after v pp . 2. this parameter is only sampled and is not 100% tested. output float is defined as the point where data is no longer driven see timing diagram. 3. program pulse width tolerance is 100 m sec 5%. atmels 27bv020 integrated product identification code (1) note: the at27bv020 has the same product identification code as the at27c020. both are programming compatible. symbol test conditions (1) ac conditions of test limits units parameter min max t as address setup time input rise and fall times (10% to 90%) 20ns input pulse levels 0.45v to 2.4v input timing reference level 0.8v to 2.0v output timing reference level 0.8v to 2.0v 2 m s t ces ce setup time 2 m s t oes oe setup time 2 m s t ds data setup time 2 m s t ah address hold time 0 m s t dh data hold time 2 m s t dfp oe high to output float delay (3) 0 130 ns t vps v pp setup time 2 m s t vcs v cc setup time 2 m s t pw pgm program pulse width (2) 95 105 m s t oe data valid from oe 150 ns t prt v pp pulse rise time during programming 50 ns codes pins hex data a0 o7 o6 o5 o4 o3 o2 o1 o0 manufacturer 0000111101e device type 11000011086
at27bv020 9 rapid programming algorithm a 100 m s pgm pulse width is used to program. the address is set to the first location. v cc is raised to 6.5v and v pp is raised to 13.0v. each address is first programmed with one 100 m s pgm pulse without verification. then a verification/reprogramming loop is executed for each address. in the event a byte fails to pass verification, up to 10 successive 100 m s pulses are applied with a verification after each pulse. if the byte fails to verify after 10 pulses have been applied, the part is considered failed. after the byte verifies properly, the next address is selected until all have been checked. v pp is then lowered to 5.0v and v cc to 5.0v. all bytes are read again and compared with the origi- nal data to determine if the device passes or fails.
at27bv020 10 ordering information t acc (ns) i cc (ma) v cc = 3.6v ordering code package operation range active standby 90 8 0.02 at27bv020-90cc at27bv020-90jc at27bv020-90tc at27bv020-90vc 42c 32j 32t 32v commercial (0 c to 70 c) 8 0.02 at27bv020-90ci at27bv020-90ji at27bv020-90ti at27bv020-90vi 42c 32j 32t 32v industrial (-40 c to 85 c) 120 8 0.02 at27bv020-12cc at27bv020-12jc at27bv020-12tc at27bv020-12vc 42c 32j 32t 32v commercial (0 c to 70 c) 8 0.02 at27bv020-12ci at27bv020-12ji at27bv020-12ti at27bv020-12vi 42c 32j 32t 32v industrial (-40 c to 85 c) 150 8 0.02 at27bv020-15cc at27bv020-15jc at27bv020-15tc at27bv020-15vc 42c 32j 32t 32v commercial (0 c to 70 c) 8 0.02 at27bv020-15ci at27bv020-15ji at27bv020-15ti AT27BV020-15VI 42c 32j 32t 32v industrial (-40 c to 85 c) package type 42c 42-ball, plastic chip-scale ball grid array (cbga) (8 x 8mm) 32j 32-lead, plastic j-leaded chip carrier (plcc) 32t 32-lead, plastic thin small outline package (tsop) (8 x 20mm) 32v 32-lead, plastic thin small outline package (vsop) (8 x 14mm) = preliminary information


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